Integrated circuit (IC) "chips" comprising very large numbers of electronic components have become ubiquitous in modern society. Electronic devices and components of all sorts, from central processing units used in all levels of computing, to highly specialized controllers used to control various types of equipment and machinery, are now routinely available as integrated circuit chips. Since the introduction of the first IC chips, there has been a remarkable increase in the number of devices contained on a single chip, as well as a corresponding dramatic reduction in the size of the individual electronic components formed on the chip. Device geometries with line widths of the order of one micron have become common so that individual IC chips now routinely contain in excess of a million electronic components. Even higher device densities are projected.
The increase in device complexity and the decrease in device size has, for many types of IC chips, sharply increased the complexity of forming interconnections between the chips and external devices. These factors, along with a third, related phenomenon, i.e., the increased speed at which many digital devices now function, have increased the heat per unit volume produced by many chips to the point where active cooling methods are required to avoid thermal damage.
Many devices, such as computers, utilize a large number of separate IC chips. For example a computer may have one or more central processing unit (CPU) chips, various memory chips, controller chips, input/output (I/O) device chips, etc. Traditionally, each chip is mounted in a separate package which is then connected to a printed circuit board, for example, a computer "motherboard," which supplies power to the chip and provides signal routing among the chips on the board and to various I/O devices. However, where an electronic device utilizes a substantial number of chips, packaging each chip separately greatly increases the total area of printed circuit board needed to interconnect all the chips. In addition, as device speed has increased, the distance between individual components has become an increasingly important factor, so that it is important, in many applications, to minimize the signal path between IC chips used in the system.
In order to overcome the aforementioned problems, many device and system makers have begun using "multichip modules," i.e., packages housing a plurality of individual IC chips. Typical multichip modules incorporate not only means for interconnecting the IC chips with external devices, but also means for interconnecting the IC chips within the module. A general introduction to multichip modules, including a discussion of the history of the development thereof, is described in the text entitled: Multichip Module Technologies and Alternatives, The Basics, D. A. Doane, et al., eds., Van Nostrand Reinhold (1993). Multichip modules significantly reduce the overall space needed to house the IC chips and, by shortening the distance between chips within the module, facilitate high speed device operation.
The first multichip modules were two-dimensional, i.e., all of the IC chips housed in the package were mounted on a planar substrate. Subsequently, three-dimensional multichip modules were developed, thereby permitting an even further increase in the density of IC chips that could be housed in a single package. However, increasing the number of IC chips housed in a relatively small area further increases the overall heat per unit volume generated by the chip array, while concurrently complicating techniques for actively cooling the chips. Likewise, placing a large number of high density chips in close proximity greatly complicates the task of supplying power to and routing signals to and from the chips.
Many of the issues associated with three-dimensional multichip modules are described in a paper entitled: "System interconnect issues for sub-nanosecond signal transmission," (L. Moresco) published in Int'l Symposium on Advances in Interconnection and Packaging, Book 2--Microelectronic Interconnects and Packages: System and Process Integration, S. K. Tewksbury, et al., eds., Proceedings of the Int'l Soc. for Optical Eng., SPIE Vol. 1390, (1990). In view of the complicating factors associated with three-dimensional arrays, two-dimensional multichip arrays remain the most common form of multichip modules in use today.
Two major substrate technologies have developed for handling the power supply and signal routing in multichip modules. Initially, co-fired ceramic substrate technology was used but gradually there has been a shift to thin film substrate technology. In either case, IC chips are connected to one or more substrates which contains all the signal and power lines needed to supply power and to interconnect the chips to each other and to external devices. In order to make the required number of interconnections, such substrates are multilayered, sometimes containing dozens of individual layers. For example, even early ceramic substrate technology utilized as many as thirty-five separate layers in the multichip substrate. However, problems arise in placing signal lines in close proximity to each other and to power supply lines. The dielectric constant of the substrate material plays an important role in solving (or creating) these problems. As a result, ceramic technology has lost favor due to the high dielectric constant associated with the ceramic materials typically selected for use as a substrate material. Instead, low dielectric thin film substrates made of materials such as copper and polyimide have become more common.
Multichip module substrates comprising thin film structures, such as a multilayered copper polyimide structure, are not inherently rigid and, therefore, must be built upon a rigid support base. Various materials are used for the rigid support base including ceramics, silicon, and various metals. Important factors in selecting the support base are compatibility with the other materials and processes used in the multichip module, and ease of processing. Material compatibility includes such factors as having a coefficient of thermal expansion ("CTE") which is similar to the thin film structure and the IC chips mounted on the substrate, and being able to withstand the processing steps associated with the fabrication of the thin film structure. Such processing may expose the support base material to extreme temperatures and harsh chemicals.
In some instances, the support base used to support the thin film structure serves no other function than as a base for the thin film structure. In other instances, the support base may be used to route power and ground lines in a combination thin film/ceramic multichip module substrate.
In a typical three-dimensional multichip module, a plurality of coplanar IC chip substrates are stacked to increase the density of the chip package. In such modules, signal, power and ground lines must be routed not only in the plane of the substrates, but also from one substrate to the next. If the plane in which a substrate lies is defined to be the x-y plane, then it will be appreciated that, in order to communicate with IC chips mounted in different levels or layers, signals must also be routed in the z direction. In known three-dimensional multichip modules, routing of the z-axis signal paths occurs at the edges of the substrates. Edge routing in the z-axis has the disadvantage of lengthening the signal paths between chips mounted on different substrates.
A problem with traditional approaches to packaging IC chips in multichip arrays is the method used for delivering power to the chips. As noted above, one aspect of this problem results from routing power lines through the same substrate utilized to carry signals to and from the chip. Equally important is the fact that the thinness of the substrates used in traditional thin film multichip modules results in power feeds to the IC chips that have relatively high impedance. This high impedance results in undesired noise, power loss and excess thermal energy production.
An object of the present invention is to improve the routing of signal and power lines to the integrated circuit chips in a three-dimensional multichip module.
A particular object of the present invention is to provide a structure, and a method of making the same, for providing high density z-axis signal routing which does not require that signals travel to the edge of substrate in order to connect to an IC chip on another substrate.
Still another object of the present invention is to provide improved low impedance means for delivering power to the chips of a multichip module.
Yet another object of the present invention is to provide a three-dimensional multichip module design that is highly modular so that the individual components can be pretested prior to final assembly of the module, and such that at least some of said components are replaceable.